MRVL (Trans): Data center capex to exceed RMB 3 tn; the company has secured 5-year capacity.

The following is Dolphin Research's transcript from Marvell Technology's 2026 Investor Day (covering FY27), with detailed analysis available in 'Marvell: Aggressive Long-Term Guide — Confidence or Just Storytelling?'.

I. Key Takeaways

1. Shareholder Returns and Capital Allocation: From FY21 to FY26, the company invested approx. $8 bn in organic R&D and about $11 bn in M&A, while returning roughly $4 bn via dividends and buybacks. Looking ahead, as FCF structurally improves, capital allocation will remain growth-first (balancing organic and inorganic), with a commitment to return a long-term Avg. of over 50% of FCF to shareholders while keeping a strong, flexible balance sheet. Management emphasized sustaining a growth-focused playbook with disciplined returns to holders. The balance sheet will support both expansion and optionality.

2. Upward-Revised Near- to Mid-Term Guidance:

a. FY26 revenue of $8.2 bn, with data center at $6.1 bn (~75%). FY27 revenue is projected at approx. $12 bn, up 47% YoY. The mix remains DC-heavy, underscoring the company's 'connect-first' positioning.

b. FY28 total revenue guide lifted from ~ $18 bn (Aug) to ~ $20 bn, or about +67% YoY; data center revenue up ~80% YoY to around $18 bn. This effectively pulls forward the prior FY29 $18 bn DC target by nearly a year (FY24–FY28 DC revenue CAGR ~70%). The extra $2 bn primarily comes from scale-out optics, scale-up optics, and switching silicon. Management cited stronger optical interconnect and switching attach as key drivers. The acceleration reflects broader DC deployments across customers.

c. Custom Silicon: FY29 revenue is projected to be over 3x FY28, reaching $12 bn+ (previously: FY28 to more than double, FY29 to surpass $10 bn). The uplift stems mainly from expanding XPU attach opportunities, including the strategic agreement announced in Aug. This suggests faster adoption of attach solutions tied to existing platforms. The custom pipeline has broadened across top hyperscalers.

3. FY31 Long-Term Model:

a. Revenue of $70–90 bn (midpoint $80 bn), implying ~10x growth over FY26 with a 55%–60% CAGR; data center at $67.5–87.5 bn (55%–70% CAGR range, midpoint ~65%), and comms/other around $2.5 bn (low single-digit growth). The outlook is DC-led with modest growth elsewhere. Scale and mix drive the bulk of expansion.

b. Segment midpoints: Interconnect approx. $37.5 bn (CAGR ~65%); switching & storage around $10 bn (CAGR ~45%, with faster growth in switching); custom about $30 bn (CAGR ~80%). Interconnect remains the largest value pool. Custom scales the fastest.

c. GPM of 56%–59% (mix-dependent): custom has lower GPM but attractive OPM given customer-funded NRE and scale; merchant parts have higher GPM but require higher R&D. Structural hedge: a custom outperformance skews GPM toward the low end, while interconnect upside pushes toward the high end. This mix framework balances profitability across cycles. Product strategy optimizes for LT value rather than headline GPM.

d. OPM of 44%–46%, up 600 bps vs. the prior LT target; OpEx growth at about half of revenue growth; tax rate 15%; FCF margin LT >36%. Operating leverage is expected to be substantial. Cash generation improves with scale.

e. FY31 non-GAAP EPS midpoint >$30 ('$30 in '30'), with earnings growth outpacing revenue growth markedly. Profit scalability reflects mix, leverage, and disciplined OpEx.

4. Track Record vs. Prior Targets: FY21–FY26 revenue CAGR was 23%, beating the 2021 LT target top end (15%–20%). Non-GAAP operating income CAGR was 32%, highlighting operating leverage. When DC revenue was $2.2 bn in FY24, R&D already ran at $1.5 bn (>50% of DC revenue); annualizing FY27 Q2, DC revenue reached $8.7 bn, about 4x vs. FY24. Execution has outpaced initial LT ambitions. Investment depth preceded revenue scale-up.

II. Investor Day Details

2.1 Management Remarks: Core Messages

1. Strategy and Market Opportunity

a. 'Connect-First' Positioning: Murphy noted that past semiconductor value creation waves were led by compute (three majors) and storage (three majors), with 'connect' as the next bottleneck and breakthrough. About 30% of FY26 revenue ties to compute and ~70% to connect; as XPU attach scales, more custom revenue will be classified under connect. The company partners with leading compute/storage vendors and all major clouds, maintaining exposure regardless of architectures. The platform approach spans architectures and deployments. Attach increases blended connect exposure over time.

b. Decade of Setup: Since 2017, the mission has been 'high-performance silicon to move, store, and process data,' unchanged to date; DC was under 10% of revenue at that time. Roughly $20 bn went to M&A and ~ $20 bn to organic investments over the past decade (~$40 bn total), while divesting non-core assets at premium valuations to focus on DC. The portfolio has been progressively concentrated. Capital has been allocated to DC-centric growth vectors.

c. TAM: Data center CapEx is expected to reach about $3 tn by CY30 (CY25–CY30 CAGR ~35%, assuming growth slows back to ~20% later), with accelerated compute at roughly $1.6 tn. The addressable DC TAM for the company is about $385 bn, plus ~$15 bn in comms/other, for a total TAM near $400 bn, ~45% CAGR, about 4x larger than the last disclosure (<$100 bn). By segment: interconnect around $65 bn (CAGR ~65%, fastest), switching & storage about $85 bn (CAGR ~40%), and custom roughly $235 bn (CAGR ~55%). Expansion is driven by optics-heavy scale-out/scale-up and custom silicon. The TAM calibration reflects broader adoption across clouds.

d. Customer Mix: The Top 10 hyperscalers delivered over 60% of DC CapEx last year and may exceed 70% by CY30 (each mapping to $20 bn+ TAM); the U.S. Top 4 accounted for over half of total CapEx last year. Most of the company’s targets can be met by the U.S. Top 4 alone, not relying on new customers or one 'home-run' design. The FY31 outlook implies hundreds of products among the Top 10, with 35+ million-dollar sockets just within the Top 4, reducing reliance on any single socket. Diversification across sockets is intentional. Portfolio breadth reduces single-point risk.

e. Strategic Agreements: Deals signed with three of the five largest global companies by market cap — a 5-year agreement with AWS in 2024 (covering custom AI, switching, DC interconnect, optics; CPO added post Celestial AI acquisition); an agreement with Nvidia (optics/photonics, NVLink Fusion scale-up networking, and AI-RAN); and a recent agreement with Google, outlining a $120 bn total opportunity over 6.5 years for custom products around the TPU ecosystem, independent from existing connect business. Such agreements typically start when annual business approaches ~$1 bn and the design funnel expands rapidly on both sides. These strategic anchors de-risk scale-up plans. They also broaden co-development across platforms.

2. Operations, R&D, and Supply Chain

a. Customer Pathway: Progression runs from Marvell standard chips in branded gear → standard chips inside custom systems → semi-custom with customer IP → full custom ASIC. The company is not an 'ASIC foundry/backend shop' and does not sell custom chips to customers who do not also procure from its platform portfolios. Platform leverage is a prerequisite for custom engagements. Integration depth increases along the path.

b. Talent and Tools: The firm partners with universities across global R&D hubs, funding 200+ students at 50+ schools annually, with 500+ interns each year and most converting to FTEs. AI design tools and an in-house Marvell design assistant are broadly used, enabling a 5-year engineer to reach the output of a 15-year engineer under traditional flows and materially shortening design cycles. Tooling productivity is a key edge. It compresses time-to-tape-out.

c. Cloud-Based EDA: In 2023, Marvell signed with AWS to migrate EDA to the cloud; over 80% of compute infra is now cloud-based. For a design without reserved servers, 30k cores and over 1 PB of data were deployed in 60 days, scaling to 70k cores by day 90; the chip taped out in under nine months and ships next year. Cloud EDA enhances elasticity and speed. It supports bursts in complex programs.

d. Supply Chain: The firm focuses on a few top-tier suppliers (wafers, substrates, packaging), providing rolling 5-year forecasts for five consecutive years; the FY31 $70–90 bn outlook has been vetted one-on-one with supplier CEOs, with capacity secured via capital commitments. Management stated it has both demand and supply in place to support next year's $20 bn target. Supply alignment underpins confidence in near-term scaling. Vendor engagement is at the CEO level.

3. Core Technology Platforms

a. AI data centers face four bottlenecks: bandwidth, latency, energy efficiency, and reach; TCO essentially reduces to 'tokens per dollar per megawatt.' AI has shifted from a chip problem to a system architecture and connectivity problem. System-level optimization is now the primary lever. Connect becomes the choke point.

b. Process: Marvell jumped from 12/16nm straight to 5nm (skipping 7nm), and has been first-wave at 3nm and 2nm, with work underway at 1.4nm (14A). First-silicon (A0) to production-yield rates have risen sharply from under 50% historically. Early-node adoption is a differentiator. Yield-on-first-silicon has improved materially.

c. Architecture: The company shifted from ~200 mm² dies to near reticle-limit big dies (~856–858 mm²), delivering the industry's first monolithic 100T switch and shipping 10+ products over 600 mm² in volume. Large monolithic architectures underpin performance and power leadership. Portfolio includes multiple reticle-class designs.

d. SerDes and Mixed-Signal: 100G/200G/400G SerDes have been validated in silicon across multiple nodes, with mass production next year, taking data rates up 8x over six years; advanced die-to-die interfaces are also in place. SerDes capability is foundational to both scale-out and scale-up. It extends to in-package links.

e. Optics and Materials: Coverage spans Mach-Zehnder modulators (20 km+), microring, EAM, and microLED/microVCSEL sources; SiGe and InP serve TIAs/drivers, with silicon photonics supporting scale across 2–1,000 km; thin-film LiNbO3 and plasmonic technologies are in development for the 3–5 year horizon. A technology-neutral approach aligns solutions to use cases. Multi-foundry partnerships are leveraged.

f. Packaging: Evolving from 2D/2.5D to die-on-die 3.5D integration, with 8–12 die per package and substrate edge lengths moving from 100 mm to 150 mm; active CPO programs are in place. Advanced integration enables higher bandwidth density. Packaging is a core competency.

g. On the memory wall, Marvell pushes memory closer to compute via controllers, Structera CXL expansion/pooling, optical interconnect for memory disaggregation, and high-density SRAM. Scale-up already accounts for over 85% of DC traffic, and scale-up optics 'has arrived.' Memory-closer architectures reduce bottlenecks. Optical memory fabrics are entering deployment.

4. Interconnect: Scale-Out and Scale-In

a. The company covers the full distance stack — from 1,000 km between DCs down to 10 cm in-package — across scale across, scale out, scale up, and scale in, claiming a unique full-stack footprint. No peer matches the breadth across domains. This enables cross-domain optimization.

b. TIA/Drivers: Leadership dates back to 40G; 1.6T Gen-1 is shipping at scale, roughly two years ahead of competitors. The analog business is rapidly tracking to a $1 bn+ annual run-rate, with scale-up TIAs/drivers set for significant revenue ramp next year. Analog remains a growth engine. Leadership is based on sustained execution across nodes.

c. PAM4 DSP: 800G remains the current AI workhorse with strong demand, driving a multi-bn-dollar DSP franchise; Marvell was first to sample 1.6T, first on 3nm, and first to 3nm volume shipments. The 1.6T family spans parallel-optimized variants (Ara base, Ara T low power/TRO, Ara X for link robustness, Ara M with MACsec, and Petra for flexible fabrics). Portfolio breadth supports diverse use cases. Mix enables ASP uplift through generational cycles.

d. 3.2T: 400G/lane PAM4 at 500 m–1 km hits limits; broader deployments need ~2 km, and Marvell first introduced Coherent-lite. Three weeks ago at ECOC, it showcased the industry's first 2nm 3.2T solution (400G/lane PAM and 3.2T Coherent-lite); the first-gen 1.6T Coherent-lite (O-band, campus) is in volume, and the roadmap extends to 6.4T. Coherent-lite extends reach with better power economics. The roadmap aligns to cloud scale-outs.

e. Scale-In: Electrical die-to-die SerDes is distance-limited; Marvell integrates microLED/microVCSEL sources with optical SerDes in-package, already collaborating with customers. Over time, this could become another multi-bn-dollar business. Optical in-package links expand scale-in horizons. Early engagements are underway.

f. DSP plus analog is still expected to be the largest contributor within interconnect, with total interconnect revenue midpoint around $37.5 bn by FY31. Scale-out and analog underpin the bulk of value. New domains add optionality.

5. Interconnect: Scale Across / Data Center Interconnect (DCI)

a. Four tailwinds: energy efficiency (shift from chassis to pluggables, 75% TCO reduction, 50% power cut per generation), DC densification, optical line system density, and the rise of scale across — direct links between AI clusters (10–1,000 km) with bandwidth ~15x traditional DCI. Use cases are expanding beyond legacy DCI. Economics favor pluggables and coherent growth.

b. Node cycles compress from 4 years to 2 years, and each generation needs multiple DSPs. Coherent pluggable module TAM is near 1 mn units this year and could exceed 3 mn by CY30. Shorter cycles amplify ASP opportunities. Volume growth compounds dollar growth.

c. Dual approach: in-house coherent modules plus leading merchant coherent DSPs, serving hyperscalers, emerging clouds, and carriers. The DSP team has operated since 2006, shipping 1 mn+ coherent modules with over 15 bn cumulative hours in the field. Experience depth is a moat. Coverage spans module and DSP layers.

d. Product evolution: 100G ZR → 400G ZR → 800G ZR (with enhanced encryption) → 1.6T multi-DSPs (campus/metro/long-haul), with 3.2T in development; 1.6T requires thin-film LiNbO3 and 3.2T targets plasmonics, with first-to-market 14Å DSP planned. Two weeks ago at ECOC, Marvell publicly showed two 2nm coherent DSPs, with the first shuttle in Jan succeeding on first pass. The roadmap extends both capacity and reach. Materials innovation underpins performance.

e. Shipments have begun to the Top 5 hyperscalers; this business is expected to grow from ~$0.5 bn in FY26 to well over $1 bn in FY28, scaling to several bn dollars in FY29–FY31. Adoption is broad-based across leading clouds. Volume ramps track cluster build-outs.

6. Switching and Scale-Up Optics

a. Scale-Out Switching: Based on the Teralynx platform, 51.2T is ramping, doubling this year and set to more than double again next year, with an annualized run-rate well over $1 bn and growing to several bn dollars. Current switching revenue is entirely scale-out. Teralynx anchors the scale-out franchise. Growth is driven by cluster expansion.

b. Teralynx T100: The first and only monolithic full-reticle 102.4T switch, integrating 512 lanes of 200G SerDes, with latency and power >20% lower vs. leading peers; it supports both scale-out and scale-up, with potential for several bn dollars in annual incremental revenue per SKU. This single-die architecture is a differentiator. It broadens TAM across domains.

c. Scale-Up Switching Roadmap: Ethernet/ESUN family (E115, 230.4T, 460.8T); UALink family with U115 next year (already deployed at a top hyperscaler), followed by U230 and U460; plus NVLink solutions via the Nvidia partnership. Management claims the industry's most comprehensive scale-up/scale-out portfolio, with scale-up switching adding several bn dollars of annual opportunity. Scale-up switching aligns to memory-heavy inference domains. Partner ecosystems de-risk adoption.

d. Scale-Up Optics Rationale: Inference is ~60% of DC infra; KV cache drives massive needs for memory capacity, bandwidth, and latency. A Rubin package has ~300 GB in-package memory, which is insufficient; the industry needs multi-cabinet scale-up domains of 512/576+ XPUs. Today, 100% of in-rack links are copper, but at 200G, copper only reaches ~2.5 m, making optics mandatory; latency must be ~200 ns with low power, and pluggables fail on bandwidth/power/latency, implying NPO/CPO is required. Scale-up optics is therefore foundational. Latency and reach constraints force optical adoption.

e. Three Product Classes: TIAs/drivers for module vendors (shipping); Fast Pipe optical engines (200G→400G/lane, recently won a major socket and multiple others); and Flat Pipe optical engines (purpose-built for scale-up, including OCI MSA standard solutions and Celestial AI's Photonic Fabric, removing DSP via analog equalization, with wins including top hyperscalers). NPO and CPO are both supported, with some customers already deploying CPO. This portfolio targets both sides of the link. Engines align to different latency/power envelopes.

f. Photonic Fabric Memory Modules/Devices: Each device integrates 8–16 modules, enabling the first true decoupling of memory expansion from compute (avoiding GPUs serving as 'the world's most expensive memory controllers'). Silicon has taped out and lit this year, with sampling to multiple customers next year. Memory-compute disaggregation is a key theme. Early hardware milestones are complete.

g. The per-XPU value for scale-up optics is on the order of several thousand dollars, with optics required at both link endpoints (XPU side and switch side). This creates substantial per-rack economics. Attach density compounds value.

7. Custom Silicon

a. Last year, Marvell had already won 18 custom AI sockets, and since then it has secured multi-gen orders at the U.S. Top 4 hyperscalers and early wins elsewhere. Custom revenue is about $1.5 bn in FY26; expected to exceed $12 bn in FY29 and reach a ~$30 bn midpoint by FY31, with a more balanced XPU vs. XPU attach mix and no single-socket concentration by then. Diversification reduces reliance on any flagship. Pipeline breadth supports steep scaling.

b. XPU: All programs are on track and shipping at volume; the roadmap moves toward more compute die, more HBM, separate copper I/O chiplets with 3.5D packaging, and an N+2 generation that hits copper limits and integrates optical I/O. Marvell will jointly promote NVLink Fusion with Nvidia (Marvell custom XPU plus Nvidia scale-up connectivity and rack solutions). Packaging advances underpin XPU scaling. Optical I/O is on the horizon.

c. Sticky XPU Attach: Attach persists across multiple XPU generations, heavily reusing Marvell IP, and can also support non-Marvell XPU platforms. This reuse accelerates time-to-market. It also broadens addressable platforms.

d. NIC: All hyperscalers have shifted or are shifting to custom NICs; Marvell invented SmartNIC in 2005, and its latest NIC exceeds 400 mm². It has secured multi-gen design wins at several hyperscalers and is ramping or executing deployments. Custom NICs deepen platform integration. Area and feature sets signal complexity.

e. Memory: A 5nm CXL portfolio (Structera X for DDR5/DDR4 reclamation/compression and Structera A for near-memory compute) is ramping early orders across multiple hyperscalers. A custom memory expander directly attached to XPU is under development. CXL is a key enabler for memory pooling. Custom expanders extend attach scope.

f. Storage: Hyperscalers want control over SSD firmware/software; Marvell provides 5nm semi-custom multi-vendor SSD controllers and storage accelerators, with wins beyond the first customer. Storage demand roughly doubles each generation. Control-plane flexibility is a differentiator. Growth tracks data intensity.

g. New Class — AI Infrastructure Management Chips: AI servers have 1,500+ sensors producing hundreds of MB/day, requiring performance ~1,000x traditional BMCs; leveraging OCTEON and 5nm IP, Marvell is developing semi-custom processors with multiple hyperscaler projects underway. Control and telemetry at AI scale need new silicon. Programs are in execution.

h. New Class — Inference Accelerators: Offload devices attached to XPUs, built on high-speed SerDes, die-to-die, SRAM (17x bandwidth, two-thirds lower idle power), and 3.5D packaging, with engagements across multiple customers. These accelerators target specific inference workloads. Packaging and memory choices drive efficiency.

i. Each XPU can host 1–2 attach sockets with ASP around $1,000, and each attach class could be a bn-dollar opportunity, with some scaling to several bn. Attach density and ASPs create meaningful TAM. Portfolio breadth widens revenue streams.

2.2 Q&A

Q: How multi-sourced are custom programs?

A: Fundamentally, the programs we are executing are proprietary and sole-sourced. They are based on Marvell IP and technology, especially for more complex products and XPU attach, where Marvell is the core, and in some cases the entire design is ours under build-to-spec — the customer gives a spec, we co-develop and deliver. This ensures tight integration and differentiation. It also aligns incentives under LT roadmaps.

Q: How is the ~$30 bn FY31 custom revenue split between XPU and XPU attach, and how much of the Aug strategic agreement is embedded?

A: By CY30/FY31, we expect a generally balanced split between existing XPU and XPU attach, though it may tilt based on ramp timing of certain projects. As for the attach and the Aug agreement, we treated the FY31 model with pragmatic caution, so do not assume the warrant value at a 'max case.' We start with the most likely outcome and adjust over time, which means not all warrant value is embedded, only what we deem appropriate at this stage.

That also means other healthy sockets contribute. As Will noted, we had 18 wins a year ago and have since added more across different hyperscalers and technologies, making the FY30 custom business diverse and rich in content. We are not betting the farm on a single giant socket; rather, we have built a portfolio that will carry us through the next few years.

Q: Are 'powered shells' sufficient to host all XPUs, and is this a constraint in discussions with hyperscaler CEOs?

A: No, it is not a constraint for our XPU programs, custom business, or current revenue. Stepping back from land, power, and shells, note that our model assumes CapEx grows 35% from FY26 to FY31, but not linearly; growth is ~70% now and likely slows to ~20% by the end, so we have ample buffer for digestion phases in AI. If CapEx performs better, we will do better, but we do not see constraints in customer discussions. We sell into all clusters and customers, not only custom systems, and our broad business connects to every GPU, XPU, and accelerator deployed globally.

Q: How is the ~ $38 bn CY30 interconnect split (DSP share/units, NPO, CPO, etc.) and which grows fastest?

A: Xi explained why scale-out will continue to perform, which is our largest business today, and we intend at least to grow in line with the market without ceding share. Russ covered scale across, which is growing and will expand further as the use case rises, data volumes increase, and shipments scale; every node jump from 800G to 1.6T to 3.2T brings ASP uplift, so dollars grow with both volume and price.

Beyond that, Dave's scale-up optics fills the remainder and will grow much faster, as we start from near-zero revenue today, move to hundreds of mn next year, and then ramp sharply. Xi's micro-emitter-based scale-in is a call option; it may not be material by FY31, but it could be, and we will not provide more precise numbers than this split framework.

Q: Does the FY31 target include work with AI labs, and is that upside in custom/attach or optics?

A: Yes, opportunities with AI labs and existing customers are broad. The core growth engine in our model leans heavily on the Top 4 hyperscalers yet remains very diversified, with 15–30 products sold into each of some large customers and deep embed across their infra; CapEx is strong and the Top 4 share is rising. AI lab engagements are an upside option, but regardless, we are embedded in the infrastructure. As Xi said, all trained models so far have used Marvell connectivity, and as they consider more custom or other solutions, it opens further opportunities for Marvell.

Q: Customers often over-forecast in high-growth cycles to secure supply. How do you manage risks in a 5-year forecast, and how is this cycle different from prior super-cycles?

A: I have spent nearly 33 years on the front line of this industry and lived through cycles, so I understand the concern. We are confident for several reasons: although we frame it as 5 years, we already have clear visibility to $20 bn next year (FY27), and our forecast runs to 2030, so the real step-ups are '27→'28, '28→'29, and '29→'30. Projects are on plan and AI investment remains extremely strong, exceeding expectations since Apr 2024. We also embedded two hedges: slower CapEx growth by the end of the period and a range-bound target to signal where we may land; even the lower bound from $20 bn is not that hard to reach.

We have worked on this for a long time, and the supply chain is aligned, so we are confident in what we can achieve. It is dynamic and market-dependent, but practically, this feels like a 3-year assessment rather than a 5-year leap.

Q: FY31 custom revenue implies ~13% TAM share; given the network linkage of XPU attach and limited custom players, why not target higher — is this bottom-up or intentionally conservative?

A: Fair question. The fact that people now ask 'why is $30 bn so low' shows how fast the market has run; in Apr 2024 we argued for a $40 bn XPU custom TAM and faced heavy skepticism, and now we see ~$235 bn. We view this plan as very realistic. XPU attach TAM is far larger than we expected a year ago — then we said ~$15 bn and now it is multiples of that; based on hit rates, our attach share should be very strong, while XPU is highly selective with a few flagship, long-duration programs supporting depth.

So if you simply divide $30 bn by $235 bn, you get ~13%, which is not unreasonable. We have plenty of 'shots on goal' and will participate where we add value and where customers want us, and if customers want more, we will lean in; given Will's programs and booked design wins, we see a compelling path to $30 bn within a range.

Q: Since acquiring Celestial AI, how has the scale-up optics opportunity evolved? How are NPO design activities progressing, and what is the cadence vs. CPO?

A: Scale-up is very exciting. In 2025 we identified it as a major inflection, with Xi showing a dramatic hockey-stick curve in scale-up optics, which is now happening; our in-house scale-up optics team has worked on the NPO optical engine roadmap for years. We chose to go big, evaluated market options, and combined with Dave and team to build a strong optical business. NPO has truly taken off, and given our wins at module vendors plus Celestial, after closing the acquisition and entering 2026, we aligned the combined roadmap, showcased scale-up switching, and saw opportunities emerge rapidly as previously latent NPO design wins surfaced and engines moved into real customer designs.

So NPO will definitely ramp, and CPO remains on track. It is not a one-or-the-other — NPO is a train that keeps running and paves the way for many customers to eventually adopt CPO; at the same time, some customers want to jump directly to CPO on certain platforms, so we run both in parallel.

(Dave Lazovsky) Optics adoption is accelerating for the reasons I outlined, with AI demand pushing the industry to adopt any optical solution that can be driven to volume fastest. In many cases, pluggable DC optics with Fast Pipe engines are repackaged as NPO — whether directly from us or via module partners, we win under the NPO form factor either way. Form factor is not the point for us; every optical technology we discussed can be delivered as NPO or CPO, and if a customer wants a Photonic Fabric in NPO, we can do that. After integrating the Celestial and Marvell optics teams, we quickly merged the Flat Pipe team to form a single analog group for fully integrated optics, leveraging all SiPh foundries (we work with all, including TSMC), covering multiple modulator technologies with a tech-neutral, customer-back approach.

Q: Are micro-VCSEL (and microLED) part of the scale-up opportunity, and how is progress?

A: The copper-to-optical transition is a once-in-a-lifetime opportunity in both scale and breadth of applications. We previously delivered these technologies with traditional laser sources, as Matt and Dave noted, but we also began focusing on micro-emitter technology because the market is so large that we want a diversified supply chain with both traditional and new sources. This adds flexibility and helps customers manage unprecedented deployment volumes. We will integrate micro-emitters with our die-to-die and optical expertise as part of an integrated offering.

Q: Since XPU attach reuses Marvell IP, is the design cycle and time-to-market faster vs. fully custom XPU accelerators?

A: Customers demand very fast execution regardless, but attach lets us leverage proven cores and even show products already in market or in customer use, enabling rapid customization of timelines and roadmaps. The ability to customize from an existing core is a 'superpower' with high leverage. On the XPU side, we can also move fast for incremental changes, but new nodes and new packaging will take longer. Attach thus offers a structurally faster path.

Q: Given faster time-to-market and higher Marvell IP content, are XPU attach GMs higher than fully custom XPU?

A: Yes, as we said last year, you should expect higher GMs on the attach side vs. XPU, driven by IP and differentiation as well as volume. Interestingly, when we introduced 'cloud-optimized silicon' in 2021 and later 'XPU attach' last summer, some questioned whether this was a pivot due to insufficient XPU wins; we argued it was a large market and a strong business for us, and that has proven true. Volumes are not small, and given accelerator counts, ASPs, and attach rates, the opportunity is meaningful and additive as we scale toward $80 bn.

Q: Scale-in (optically enabled remote memory access) was hot at ECOC, seen by some as multiples of scale-up; how large is it, what is customer engagement and timing (earliest CY29 in market chatter)?

A: This is a great closing question on LT opportunities. We could do a full talk on it today; we have a viewpoint, are investing R&D, and already have multiple projects with several customers, and we think it is a massive market. But today we focused on core businesses that alone can take us to multiples of current scale. Scale-in will likely become another major growth curve for Marvell, potentially starting within the forecast period, and by a future Investor Day we expect it to be a key theme — essentially a 'fourth pillar' of our connect story, even as the third pillar (scale-up) is just getting underway.

Remember, we have already 'loaded' the fourth pillar and are investing, with full teams and key partners engaged. This is not a skunkworks; it is a structured program.

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